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AMD Begins Production of 'Venice' EPYC Server Chip, First High-Performance Processor on 2nm

AMD has started ramping production of its next-generation EPYC "Venice" server processor on TSMC's 2nm process node in Taiwan, the first high-performance computing chip in the industry to reach that milestone, packing up to 256 Zen 6 cores.

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AMD announced that its next-generation EPYC server processor, codenamed "Venice," has begun ramping production on TSMC's advanced 2nm process technology at facilities in Taiwan, with plans to later extend production to TSMC's Arizona plant. The company says Venice is the first high-performance computing product in the industry to reach production on TSMC's N2 node, a milestone in the race among chipmakers to shrink transistor sizes further.

Venice packs up to 256 Zen 6 cores and, according to AMD, delivers a roughly 70 percent compute performance gain over the current EPYC "Turin" lineup that powers much of today's data center and cloud computing infrastructure. The chip formally launched at AMD's Advancing AI 2026 conference in San Francisco, marking the commercial debut of the first x86 server CPU built on TSMC's 2nm Gate-All-Around transistor architecture.

AMD also used the event to announce a follow-on processor codenamed "Verano," signaling the company's server roadmap extending well beyond Venice. The announcement intensifies competition with rival Intel and with TSMC's other major customers over access to leading-edge manufacturing capacity, as demand for AI and cloud computing chips continues to strain global semiconductor supply.

Key facts

  • AMD's EPYC "Venice" is the first HPC chip in production on TSMC's 2nm node
  • Venice packs up to 256 Zen 6 cores
  • AMD claims roughly a 70% compute performance gain over EPYC Turin
  • AMD also announced a follow-on chip codenamed "Verano"

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